First Lessons For Circuit Designers

• Start from the Basics
• Workflow of FDTD
• Parallel-Plate Capacitor and Waveguide
  • This tutorial covers
  • Problem
  • Create Conductors
  • Requirements for the Mesh
    • General Requirements
    • Courant-Friedrichs-Lewy (CFL) Criterion
  • Create a Mesh
    • Obtain the Mesh Object
    • Decide the Upper Frequency and Mesh Resolution
    • A Simple But Flawed Mesh
    • A Practical Mesh
      • Simulation Box Size
      • Zero-Thickness Metal Alignment
      • 1/3-2/3 Rule
  • Optional: Create A Field Dump Box
  • Purpose of Ports
    • Select the Right Port Type
    • Test Fixture as 1-Port or 2-Port Network
  • Create Ports
  • Create Excitation
  • Specify the Boundary Conditions
    • Reflecting (Dirichlet) Boundary Conditions
    • Absorbing Boundary Conditions (ABC)
    • Set Boundary Conditions
  • Start Simulation
  • Code Checkpoint 1
    • Our Existing Code So Far
    • Code Refactoring
  • Run Simulation
  • Built-In Post-Processing
    • Port Attribute References
    • Introduction to S-parameters
    • Calculate S-parameters
    • Plot S-parameters via matplotlib
    • Plot Z-parameters (Impedances) via matplotlib
    • Code Checkpoint 2: Eliminate Repetitions in matplotlib Code
    • Plot Time-Domain Waveforms via matplotlib
    • Export S-parameters to Touchstone
  • Code Checkpoint 3
  • Third-Party Post-Processing
    • S-parameters Analysis via scikit-rf
    • Transient Analysis via SignalIntegrity
    • S-Parameters Analysis via Qucs-S
    • Field Dumps Analysis via ParaView
  • Experimental Validation and Discussion
    • Motivation
    • Experiment
    • Results
    • Impedance Transformation
  • Troubleshoot
    • Notes for Wayland Users
    • Warning: Unused primitive (type: Box) detected in property: plate!
    • Warning: Unused primitive (type: Box) detected in property: port_excite_1!
    • CalcVoltageIntegral: Error, only a 1D/line integration is allowed
    • No Qucsator in Qucs-S
  • Bibliography